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Bochs 2.7 freeware
... IA-32 (x86) PC emulator written in C++, that runs on most popular platforms. It includes emulation of the Intel x86 CPU, common I/O devices, and a custom BIOS. Currently, Bochs can be compiled to emulate a 386, 486, Pentium/PentiumII/PentiumIII/Pentium4 or x86-64 CPU including optional MMX, SSEx and 3DNow! instructions. ...
Author | Volker Ruppert |
Released | 2021-08-01 |
Filesize | 5.40 MB |
Downloads | 569 |
OS | Windows XP, Windows Vista, Windows Vista x64, Windows 7, Windows 7 x64, Windows 8, Windows 8 x64, Windows 10, Windows 10 x64 |
Installation | Instal And Uninstall |
Keywords | PC emulator, emulate PC, AT hardware emulator, emulate, emulator, AT hardware |
Users' rating (9 rating) |
Bochs Free Download - we do not host any Bochs torrent files or links of Bochs on rapidshare.com, depositfiles.com, megaupload.com etc. All Bochs download links are direct Bochs download from publisher site or their selected mirrors.
2.7 | Aug 1, 2021 | New Release | |
2.6.11 | Feb 7, 2020 | New Release | General: Added 64-bit support to the NSIS installer script Several fixes in the build system based on Debian patches |
2.6.10 | Dec 4, 2019 | New Release | General: Disabled legacy "load32bitOShack" feature. Improved NSIS win32 installer script. CPU / CPUDB Significant speedup to simulation of milti-threaded guest (patch by Luigu.B) Bugfixes for CPU emulation correctness (critical bugfixes for PCID, ADCX/ADOX, MOVBE, AVX/AVX-512 and VMX emulation) x87: implemented FOPCODE and FDP deprecation features AVX-512: implemented AVX-512 VBMI2/VNNI/BITALG instructions Crypto: Implemented VAES instructions / VPCLMULQDQ / GFNI instruction VMX: Implement EPT-Based Sub-Page Protection CPUID: Added Skylake-X CPU definition (features AVX-512 support) CPUID: Added Cannonlake CPU definition (features more AVX-512 levels, UMIP, SHA, PKU support) CPUID: Added Icelake-U CPU definition (features more AVX-512 levels, UMIP, SHA, GFNI, VAES, PKU support) CPUID: Implemented SCA (Side-Channel-Attack) Prevention reporting and corresponding MSR registers, enabled for Icelake-U CPU definition Bochs Debugger and Instrumentation: Added support for conditional breakpoin |